CoWare Platform-driven ESL Design Methodology...
CoWare Platform-driven ESL Design Methodology Reduces Design Cycles for IBM PowerPC® 440 and IBM CoreConnectTM-based Applications
IBM PowerPC 440 Processor Support Package and IBM CoreConnect Bus Library Are Latest Additions to CoWare’s Fast-Growing, SystemC-based Model Library
San Jose, CA, September 24, 2007 * * * CoWareÒ, Inc., a leading supplier of platform-driven electronic system-level (ESL) design software and services, announced two new IBM model sets have been added to its SystemC Model Library. These include the IBM PowerPC 440 Processor Support Package and the IBM CoreConnect Bus Library, which consist of a set of SystemC models for PLB and DCR busses, and is available with some sample PLB and DCR peripherals.
CoWare’s platform-driven ESL design solution enables hardware verification, architecture exploration, and software development on IBM PowerPC 440- and CoreConnect-based platforms. With CoWare’s solution, engineers can discover issues early in the design cycle, parallelize hardware and software development and, consequently reduce their design cycle.
“Design at the electronic system-level is essential to take optimum advantage of the IBM PowerPC 440’s and IBM Core Connect’s powerful capabilities in a product platform,” said Richard Busch, director of ASIC Products, Power Architecture Licensing and Cores, IBM Global Engineering Solutions. “We’re excited that our collaboration with CoWare provides our mutual customers with the right tools to help make these architectural decisions and start software development earlier in the design cycle.”
“Consumer electronic products contain so much software now that having models available early, prior to the completion of the hardware platform, is essential,” said Tom De Schutter, marketing manager, IP & third-party relationships, CoWare. “Software development needs to begin early in the highly-competitive consumer electronics market so that the design cycle can be reduced and the platform can be optimized quickly. Availability of the right architecture and software are today’s main competitive differentiators.”
The integration of the transaction-level SystemC IBM IP models into the CoWare tools offers users a fast simulation speed environment with an extensive set of configuration options. This ensures that important design decisions can be optimized in the context of the full platform running the real software on the processors. The right set of debug and analysis features boost hardware verification, architecture exploration, and software development productivity. This in turn reduces the design cycle and helps prevent over design of the target platform. The result is a reduction in the final cost of the product.
IBM PowerPC 440 and IBM CoreConnect models are available immediately in the CoWare SystemC Model Library. For more information about these models and other IP models available in the CoWare Library, and for information about CoWare’s products, visit www.CoWare.com.
CoWare is the leading supplier of platform-driven electronic system-level (ESL) design software and services. CoWare offers a comprehensive set of ESL tools that enable electronics companies to “differentiate by design” through the creation of system IP including embedded processors, on-chip buses, and DSP algorithms, the architecture of optimized SoC platforms, hardware/software co-design, and virtual platforms for device software development. The company’s solutions are based on open industry standards including SystemC. CoWare’s customers are major systems, semiconductor, and IP companies in the market where consumer electronics, computing, and communications converge. CoWare’s corporate investors include ARM [(LSE: ARM); (NASDAQ: ARMHY)], Cadence Design Systems (NASDAQ: CDNS), STMicroelectronics (NYSE: STM), and Sony Corporation (NYSE: SNE). CoWare is headquartered in San Jose, Calif., and has offices around the world. For more information about CoWare and its products and services visit http://www.coware.com. * * *
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